The present invention relates to a method and a device for evaluating the throughput of virtual circuits employing an asynchronous time-division multiplexed transmission channel.
An asynchronous time-division multiplexed transmission channel is a transmission channel carrying data messages within digital data structures referred to as cells. Each cell consists of a header made up, for example, by four characters of eight bits and a message body containing a defined number of characters, 32 for example. On the transmission channel, such cells follow each other without interruption. If there is no message to be transmitted, the transmission channel carries an "empty" cell, in other words a cell having the same format as a message cell and carrying conventional information that is readily recognizable. Steps are taken for maintaining a sufficient proportion of such empty cells in the message cell stream; they have the purpose, notably, of synchronizing the receive end to the cell format.
The header of each message cell contains, coded on two characters for example, an item of information that defines, for use by the receive end, the direction in which the message body should be retransmitted. The two other characters of the header contain service information and, notably, code checking and error detecting information relating to the two above characters relating to the destination of the cell. The same information is again encountered in the headers of irregularly spaced cells having the same destination. It thus identifies a sort of virtual circuit occupying part of the transmission capacity of the transmission channel. More generally, this virtual circuit will occupy the transmission channel and will introduce a certain throughput or traffic load thereinto, measured, for example, in cells by unit of time, and this throughput is subject to fluctuation. The invention has precisely the object of evaluating this throughput.
At any given time, the transmission channel is supporting several virtual circuits the cells of which interfit in irregular fashion into what is commonly called an asynchronous time-division multiplex. The fluctuating throughputs of the various virtual circuits are different. The sum of the throughputs is limited by the maximum throughput of the transmission channel, and this also fluctuates. This leaves space for the transmission of empty cells.
Moreover, the number of virtual circuits which can be separately identified depends on the number of bits allocated to this information in the cell header. The maximum number of virtual circuits is determined for its part, among other things, by the number of virtual circuits obtained by dividing the maximum throughput of the transmission channel by the minimum throughput of a data source able to employ a virtual circuit. This is very high and for example reaches 64 K.
But asynchronous time-division multiplex transmission is intended for the widest areas of application and the bit rates to be catered for from sources able to use a virtual circuit vary over an enormous range of rates (for example from several kilobits to several hundred of megabits per second). The number of virtual circuits that are active will hence in general be less than their maximum number.
An asynchronous time-division multiplexed transmission channel is hence designed for carrying data supplied by sources having varied and fluctuating bit rates. Further along the path to their destinations, switching and transmission equipment route the messages contained in the cells to their destination. A check is hence required, at the level of the transmission channel considered for avoiding the danger of congestion further down the line, that no source, as a result of faulty operation or improper use, is introducing a throughput that is greater than the overall throughput assigned to the circuit. If this does happen, the currently employed corrective action consists in preventing the transmission channel from carrying any cell that is considered as in excess with respect to the throughput globally assigned to the virtual circuit, or at least in marking the excess cell as such, so that it will be rejected further down the line should congestion exist. The present invention relates to a system for evaluating the throughput of virtual circuits which enables such verification to be carried cut and excess cells to be thus signaled.
Systems of the type are already known. For example, patent specification FR-A-2 616 024 teaches the use of a clock and a counter provided with one threshold per virtual circuit. The counter steps forward at each cell and back at each clock pulse. If the cell rate becomes greater than the rate of clock pulses, the counter reaches the threshold and provides a signal output.
Such a system is not applicable when the number of virtual circuits is very high and the cell duration is very short (500 ns, for example), the time necessary for causing all the counters to increment following a clock pulse then exceeding the duration of a cell.